Improved Monolayer MoS Performance With Two-Step Atomic Layer Deposited High- Dielectrics<sub /> <i />

Gate dielectric engineering is crucial to enable two-dimensional (2D) transition metal dichalcogenides (TMDs) for logic transistor applications. In this work, we demonstrate a uniform and pinhole-free bilayer high-K fabricated on monolayer (1L) molybdenum disulfide (MoS2) through thermal atomic layer deposition (ALD) without surface pretreatment. A thin low-temperature (75∘C) AlOx film deposited directly 1L-MoS2 mitigates 2D channel damage serves as nucleation protection high-temperature (250∘aC) HfOx layer. The back-gate (BG) devices with ALD capping show minor mobility degradation, less threshold voltage shift, smooth topography, lower device variability compared those capping. These electrical differences are closely related the coverage of at initial stage resultant quality -MoS2 interface after deposition. underlying mechanism TMDs proposed in terms physical analysis findings. This work provides practical scalable approach gate dielectrics toward high performance electronics.